The present invention relates to the fabrication of semiconductor-based devices. More particularly, the present invention relates to semiconductor manufacturing equipment that form semiconductor-based devices using etch processes.
In the fabrication of semiconductor-based devices, e.g., integrated circuits or flat panel displays, layers of materials may alternately be deposited onto and etched from a substrate surface. As is well known in the art, the etching of the deposited layers may be accomplished by a variety of techniques, including plasma-enhanced etching. In plasma-enhanced etching, the actual etching typically takes place inside a plasma processing chamber. To form the desired pattern on the substrate surface, an appropriate mask (e.g., a photoresist mask) is typically provided. A plasma is then formed from a suitable etchant source gas, or mixture of gases, and used to etch areas that are unprotected by the mask, thereby leaving behind the desired pattern.
To facilitate discussion, FIG. 1A depicts a simplified semiconductor-based device processing apparatus 100 suitable for fabrication of semiconductor-based devices. The simplified semiconductor-based device processing apparatus 100 includes a wafer processing chamber 102 having an electrostatic chuck (ESC) 104. The ESC 104 acts as an electrode and supports a wafer 106 during fabrication. A focus ring 108 borders the edge of the ESC 104. In the case of etch processes, a number of parameters within the wafer processing chamber 102 are tightly controlled to maintain high tolerance etch results. Process parameters governing etch results may include gas composition, plasma excitation, plasma distribution over the wafer 106, etc. Since the etch tolerance (and resulting semiconductor-based device performance) is highly sensitive to such process parameters, accurate control thereof is required.
In a chemically driven plasma etch process, such as a metal etch, the local etch rate is dominated by the concentration of neutral reactants. Chemically driven etch processes include, for example, tungsten layer etching by fluorine, aluminum layer etching by chlorine and tungsten silicide etching by chlorine. In these chemically driven etch processes, there may be a depletion of available reactants in a middle portion 114 of the wafer 106 relative to the wafer perimeter 116. This differential availability of reactants is contributed to by diffusion of neutral reactants from neutral reactant rich regions 120 outside the wafer perimeter 116. The increased concentration of process gases near the wafer perimeter 116 increases the etch rate in the wafer perimeter 116, resulting undesirably in a non-uniform etch of the wafer 106. FIG. 1B illustrates a cross-section of the wafer following etch processes where the etched depth is greater at the wafer perimeter 116 than at the middle portion 114.
One known approach for improving etch rate uniformity in a chemically driven etch process is to install a diffusion barrier 118 around the wafer perimeter 116. The diffusion barrier 118 is effective in substantially impeding (i.e. restricting) the diffusion of neutral reactants from the neutral reactant rich regions 120 outside the wafer perimeter 116 into regions over the wafer 106. As a result, the use of the diffusion barrier 118 leads to improved etch uniformity in many chemically driven etch processes.
However, diffusion barriers, such as the diffusion barrier 118, are not used during ion-assisted (or ion-driven) etch processes (e.g. a plasma enhanced etch process). More specifically, the diffusion barrier 118 is believed to quench the plasma and thus disturb the ion density uniformity in the plasma In an ion-assisted etch process, the local etch rate is sensitive to ion concentration. An example of an ion-assisted process is chlorine etching of polysilicon layers. As a result, if the barrier 118 were to be used, the plasma density near the wafer perimeter 116 would be lowered and thus cause a non-uniform etching during an ion assisted/driven etch. Because the diffusion barriers compromise the quality of an ion-driven etch, separate plasma processing chambers are often used when both ion-assisted etching and chemically driven etching is to be performed.
Undesirably, as a result of this processing conflict, a facility may need to purchase, run and maintain two separate and costly machines to perform chemically driven and ion driven etch processes. Additionally, to perform a chemically driven etch process and an ion driven etch process on the same wafer, the wafer must be exchanged between two separate machines. This considerably slows processing time as the wafer must be transferred and each apparatus must separately establish its highly controlled processing conditions. Further, the increase in processing time decreases throughput and increases wafer processing costs.
In view of the foregoing, there is a need for improved approaches to performing etch processes in semiconductor manufacturing equipment.
Broadly speaking, the invention relates to a semiconductor manufacturing apparatus having a diffusion barrier that can be positioned in multiple positions relative to the wafer. In one position, the diffusion barrier acts to inhibit diffusion of neutral species which may compromise etch uniformity or quality of chemically driven etch processes. In another position, the barrier is recessed so as to not disturb an ion-assisted etch process. Advantageously, these two types of etch processes may be performed, either for the same wafer or alternate wafers, within the same chamber. For multiple etch processes of different types occurring on a single wafer, the invention can yield a substantial decrease in production time and cost.
The invention relates in one embodiment of the present invention to a semiconductor-based device processing apparatus. The apparatus includes a chuck for supporting a wafer. The apparatus also includes a barrier having a first position relative to the wafer wherein the first position relative to the wafer substantially facilitates etch uniformity for a chemically driven etch process, and having a second position relative to the wafer wherein the second position relative to the wafer does not interfere with the etch uniformity of an ion driven etch process.
In another embodiment, the invention relates to a semiconductor-based device processing apparatus. The apparatus includes a chuck for supporting a wafer. The apparatus also includes a moveable barrier having a first position and a second position, wherein the first position is capable of restricting diffusion of gases within the plasma processing apparatus to the wafer.
In yet another embodiment, a method for performing a multi-step etch within a semiconductor-based device processing apparatus is provided. The semiconductor-based device processing apparatus includes a barrier having a first position relative to the wafer facilitative of a first etch process and a second position relative to the wafer for facilitating a second etch process. The method includes performing the first etch process with the barrier in the first position relative to the wafer. The method also includes changing the position of the barrier relative to the wafer from the first position relative to the wafer to the second position relative to the wafer and then includes performing the second etch process with the barrier in the second position relative to the wafer.